xDRT Development Kits
Customizable Development Kits
Trident xDRT Development Kits are lab-based development platforms, preloaded with Trident FW/SW (source files included), for application development, testing, and HWIL demonstrations on Trident Hardware. Compatible with Tridents 3U VPX modules, the kits provide operational and developmental interfaces to flight-like hardware with “lab-friendly” interfaces. These kits are a low-cost, rapidly available platform for new and existing customers. Currently available for UDRT and RDRT, VDRT Development Kit order entry open with Q1-2023 delivery; customization and on-site/remote support available.
UDRT DEV KIT SPECIFICATIONS
— Integrated UDRT EDU with XQZU19EG-1FFRC1760M
in LVAUX mode with flight and developmental interfaces
– 4 GB PL and 4 GB PS DDR4 Memory
– 1 GB NAND Flash, 128 MB Redundant NOR Flash
– Two Zynq-PS Ethernet (RJ45)
– Zynq GTY Quad (QSFP+)
– Two (2) Zynq UART connections (USB)
– Zynq/ProASIC JTAG (USB, integrated Pod)
– 1 Pulse Per Second (SMA)
– Discrete boot and power control
– Includes 1 TB SSD on mezzanine site
Included Source Files and Docs
— Trident Yocto Layer BSP
— Zynq processor configurations (TCL)
— Zynq Programmable Logic SDRAM setup (XCI)
— MGT setup constrained by REF CLKs (XCI)
— Pin constraints for the entire chip (XDC)
— Example Project/Bitstreams
— Engineering GUI and C2 GUI for Flight SW
— Library and HW User Manual and Documentation
SWaP
— Benchtop or 19” rack-mountable (3U height)
— 120 VAC (Integrated Power Supply)
— ~8 kg, shipped in protective storage container
Rapid Availability
— From stock to 14-16 weeks
— On-site and remote support included
— Kit Customization is available for interfaces and other mezzanine cards
RDRT DEV KIT SPECIFICATIONS
— Integrated RDRT EDU with XQZU28DR-1FFRG1517M in
LVAUX mode with flight and developmental interfaces
– 8 TX and 8 RX Channels (50 ohm, SMA)
– 4 GB PL and 4 GB PS DDR4 Memory
– 1 GB NAND Flash, 128 MB Redundant NOR Flash
– Two Zynq-PS Ethernet (RJ45)
– Zynq GTY Quad (QSFP+)
– Two (2) Zynq UART connections (USB)
– Zynq/ProASIC JTAG (USB, integrated Pod)
– 1 Pulse Per Second (SMA)
– Discrete boot and power control
– Programmable GPIO (routed on mezzanine)
Included Source Files and Docs
— Trident Yocto Layer BSP
— Zynq processor configurations (TCL)
— Zynq Programmable Logic SDRAM setup (XCI)
— MGT setup constrained by REF CLKs (XCI)
— Pin constraints for the entire chip (XDC)
— Example Project/Bitstreams
— Engineering GUI and C2 GUI for Flight SW
— Library and HW User Manual and Documentation
— Compatible with Xilinx “RF Analzyer” Tool
SWaP
— Benchtop or 19” rack-mountable (3U height)
— 120 VAC (Integrated Power Supply)
— ~9 kg, shipped in protective storage container
Rapid Availability
— From stock to 14-16 weeks
— On-site and remote support included
— Kit Customization is available for interfaces and other mezzanine cards
VDRT DEV KIT SPECIFICATIONS
— Integrated VDRT EDU with XCVC1902-1MSIVIVA1596
with flight and developmental interfaces
– Two (independent) 8GB DDR4 Memory Banks w/ ECC
– 32GB (minimum) of NAND Flash, 256MB Redundant NOR Flash
– Two PS Ethernet (RJ45)
– Three Zynq GTY Quad (QSFP+)
– Two (2) Zynq UART connections (USB)
– Zynq JTAG (USB)
– 1 Pulse Per Second (SMA)
– Discrete boot and power control
– 1 TB SSD on mezzanine site optional
Included Source Files and Docs
— Trident Yocto Layer BSP
— Example Vivado Project
• NOC configuration (DRAM / Interconnect)
• AICore Demo
• Processor configuration
— Pin constraints for the entire chip (XDC)
— Engineering GUI and C2 GUI for Flight SW
— HW User Manual and Documentation
SWaP
— Benchtop or 19” rack-mountable (3U height)
— 120 VAC (Integrated Power Supply)
— ~8 kg, shipped in protective storage container
Rapid Availability
— From stock to 14-16 weeks
— On-site and remote support included
— Kit Customization is available for interfaces and other mezzanine cards